555 Timer Component & Tolerance Calculator
Enter the frequency, high duty cycle, and timing capacitor for a standard two-resistor 555 astable circuit. The calculator solves the ideal resistor values, finds a practical E-series pair, and shows how stated component tolerances move the result.
Recommended standard R1 (kΩ)30
- Exact R1 (kΩ)
- 28.85
- Exact R2 (kΩ)
- 57.71
- Recommended standard R2 (kΩ)
- 56
- Actual nominal frequency (Hz)
- 1,015.98
- Frequency error
- 1.6%
- Actual high duty cycle
- 60.56%
- High time (ms)
- 0.6
- Low time (ms)
- 0.39
- Worst-case frequency range
- 879.64 Hz to 1,188.28 Hz
- Worst-case duty-cycle range
- 59.75% to 61.42%
Searches individual E24 resistor values from 1 kΩ through 10 MΩ.
Tolerance bounds vary the two resistors and capacitor independently to their stated limits.
How to use this calculator
- Enter the intended free-running frequency and high output duty cycle.
- Choose the timing capacitor value you expect to fit in the circuit.
- Select the resistor series that matches the parts you can buy or stock.
- Enter the resistor and capacitor tolerances, then check the selected pair and worst-case ranges.
How the 555 astable values are calculated
In the standard 555 astable connection, R1 runs from the positive supply to the discharge pin and R2 runs from the discharge pin to the timing capacitor. The capacitor charges through R1 and R2, then discharges through R2. That is why the output stays high for longer than it stays low, and why this circuit cannot produce a 50% or lower high duty cycle without changing the circuit.
Let f be the target frequency, D the high duty cycle as a decimal, C the capacitance in farads, and L = ln(2). The target period is T = 1 / f. The ideal resistor values are:
R2 = (1 − D)T / (L × C)
R1 = (2D − 1)T / (L × C)
The tool then checks every R1 and R2 combination in the chosen IEC 60063 E-series from 1 kΩ through 10 MΩ. For each pair it calculates tH = L(R1 + R2)C, tL = L × R2 × C, f = 1 / (tH + tL), and D = tH / (tH + tL). It selects the pair with the smallest combined relative frequency and duty-cycle error, rather than rounding each ideal resistor independently.
What moves the result most
The timing capacitor strongly affects frequency because it multiplies the whole period. A 10% capacitor tolerance can move frequency much more than a pair of 1% resistors. The R1-to-R2 ratio controls duty cycle, while their combined value controls period. Choosing a finer E-series gives the search more nearby resistor pairs, but the resistor tolerance still needs to be consistent with that series and with the design requirement.
The displayed frequency range uses the slowest period with both resistors and the capacitor high, and the fastest period with all three low. The duty-cycle range uses low R1 with high R2 for the minimum, then high R1 with low R2 for the maximum. These are deliberate component-limit combinations, not likely average outcomes.
What this calculator leaves out
The estimate is for the ideal two-resistor astable equation. It does not include the timer's threshold and discharge errors, temperature drift, capacitor leakage or ESR, breadboard parasitics, supply noise, output loading, or the frequency limit of a particular 555 version. A bipolar NE555 and a CMOS 555 can behave differently at high frequency and with large timing resistances, so verify the exact manufacturer's data sheet and measure the completed circuit.
Worked example
For 1,000 Hz, a 60% high duty cycle, and a 10 nF capacitor, the ideal values are R1 = 28.85 kΩ and R2 = 57.71 kΩ. Searching E24 values gives R1 = 30 kΩ and R2 = 56 kΩ. That pair produces 1,015.98 Hz, a 1.60% frequency error, and a 60.56% high duty cycle.
With 5% resistors and a 10% capacitor, the component-only worst-case frequency range is 879.64 Hz to 1,188.28 Hz. The high duty cycle can range from 59.75% to 61.42%. The capacitor tolerance is the main reason the frequency band is wider than the duty-cycle band.
Common questions
How do I choose R1, R2, and C for a 555 astable timer?
Choose a capacitor value that is available with a suitable dielectric, voltage rating, tolerance, and leakage specification, then solve for R1 and R2. This calculator searches standard resistor pairs after calculating the ideal values. Check that the selected resistance range is appropriate for the particular timer data sheet.
Why can a standard 555 astable circuit not reach exactly 50% duty cycle?
During the high portion, the capacitor charges through both R1 and R2; during the low portion, it discharges through R2 alone. R1 therefore adds time only to the high portion. A positive R1 makes the high duty cycle greater than 50%, while R1 equal to zero is not a practical standard design.
How can I obtain a duty cycle below 50% with a 555 timer?
Use a steering diode arrangement so the capacitor has separate charge and discharge resistors, or use a different oscillator topology. Those circuits break the standard two-resistor relationship used here. Recalculate from the chosen circuit's equations rather than treating this tool as a universal 555 duty-cycle calculator.
Why does my measured 555 frequency differ from the calculation?
Component tolerance is often the largest cause, especially for timing capacitors. Threshold variation, capacitor leakage, temperature, supply conditions, board capacitance, and measurement loading also change the observed period. The listed range isolates component tolerance only, so it is not a complete production limit.
What is the difference between NE555 and CMOS 555 timing accuracy?
Both use the same basic astable equations, but their internal thresholds, discharge behavior, supply current, and usable frequency range differ by part and manufacturer. CMOS versions generally suit low-power operation and can support higher timing resistances, but the data sheet is the authority for a specific component. Do not substitute one timer family for another without rechecking the design limits.